New advancements in charge-coupled device technology - sub-electron noise and 4096x4096 pixel CCDs

This paper reports on two new advancements in CCD technology. The first area of development has produced a special purpose CCD designed for ultra low-signal level imaging and spectroscopy applications that require subelectron read noise floors. A nondestructive output circuit operating near its 1/f noise regime is clocked in a special manner to read a single pixel multiple times. Off-chip electronics average the multiple values, reducing the random noise by the square-root of the number of samples taken. Noise floors below 0.5 electrons rms are reported. The second development involves the design and performance of a high resolution imager of 4096x 4096 pixels, the largest CCD manufactured in terms of pixel count. The device utilizes a 7.5-micron pixel fabricated with three-level poly-silicon to achieve high yield. 1. SKIPPER CCD iLi_ Introduction In the past, buried-channel CCDs often required a bias or "fat-zero" charge to successfully transfer very small charge packets. The fat-zero generated a shot noise component that was usually higher than the noise produced by the sensor's on-chip amplifier. The Texas Instruments 800x800 3-phase CCD, for example, requires a fat-zero of 100 electrons (e-) to fill-in a design induced trap associated with its transfer gate region1. Although the on-chip amplifier noise for the TI device is only 6 erms, the fat-zero required for complete transfer generates a shot noise of 1 0 eincreasing the overall noise floor of the detector to 1 1 .6 e-. CCD manufacturers have recently made notable progress in eliminating design and process induced trapping centers similar to those experienced with the TI CCD2. Today, charge transfer efficiency (CTE) performance is usually limited by bulk state traps, small electron traps due to impurities found naturally in the bulk silicon on which the CCD is made. Current CCDs exhibit near perfect CTE as a result of the high quality silicongrown today. For example, a "bulk state limited" CCD can transfer a 10,000 echarge packet 521 transfers with less than 5 edeferred without the aid of fat-zero charge3. SPIE Vol. 1242 Charge-Coupled Devices and Solid State Optical Sensors (1990) / 223 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 10/18/2016 Terms of Use: http://spiedigitallibrary.org/ss/termsofuse.aspx Although charge packets of a few electrons can be transferred, the CCD is unable to read the charge accurately because of the relatively high noise floor inherent to the sensor's on-chip amplifier (typically a few electrons rms). Efforts this year have been directed at the CCD manufacturer to break the 1 enoise barrier so that the high CTE now achieved can be fully exploited. Theoretically, the read noise for the scientific CCD can be reduced without limit by the amount of process time spent on each pixel. There are, however, practical limits to this procedure. Employing short sample periods of typically less than 8 micro-seconds, we find that the noise of the CCD decreases by the square root of the sample time. However, for longer sample times, the noise only gradually decreases and, for some CCD camera systems, the noise actually increases due to low frequency noise sources encountered (e.g., 1/f noise generated by the CCD amplifier). Our current knowledge in minimizing CCD amplifier noise indicates that 2 to 3 emay be the practical limit assuming that conventional output charge detection schemes are utilized (i.e., floating diffusion MOSFET amplifiers). The CCD Skipper was invented to circumvent the 1/f noise problem and realize a square root reduction in noise with increasing sample time thereby allowing sub-electron noise floors to be achieved. The principal function of Skipper technology is to allow the user to nondestructively measure the charge contained in a pixel multiple times (similar to CID operation) using a "floating gate" amplifier. The samples collected for a given pixel are then averaged together off-chip reducing the random noise of the on-chip amplifier by the square root of the number of samples taken. For example, if a pixel is sampled 1 00 times, the random noise associated with the on-chip amplifier is diminished by a factor of ten. 1 .2 Architecture. Operation and Fabrication Figure 1 shows a design layout of an experimental Skipper CCD fabricated at Ford Aerospace. The design shows the output region and the floating gate electrode used to detect signal charge in the channel near the end of a three-phase horizontal register. The floating gate is connected to a MOSFET source follower amplifier and to a MOSFET reset switch used to preset the gate to a reference voltage before signal charge is dumped. The Skipper sequence begins by clocking the horizontal register one pixel and transferring charge into gate 1 224 / SPIE Vol. 1242 Charge-Coupled Devices and Solid State Optical Sensors (1990) CCD SKIPPER Figure 1 . Design layout of an experimental Skipper CCD. Downloaded From: http://proceedings.spiedigitallibrary.org/ on 10/18/2016 Terms of Use: http://spiedigitallibrary.org/ss/termsofuse.aspx (refer to Figure 2). The horizontal clocks are then inhibited for the duration of the Skipper cycle and, shortly thereafter, the floating gate is preset to Vref. Gate 1 is then clocked low forcing charge to transfer through gate 2 into the potential well under the floating gate. The voltage at the output source of the amplifier changes in proportion to the amount of charge transferred beneath the floating gate. The voltage is then sampled by offchip electronics resulting in the first sample for the pixel. The charge packet is then quickly moved back to gate 1 by clocking gates 2 and 1 high completing the sequence. The floating gate is reset again and the above cycle is repeated several times depending on the final noise level required.